What SMIC Learning Means for the Next Decade

The Semiconductor Manufacturing International Corporation — SMIC, headquartered in Shanghai — does not appear in most AI competition analyses because it does not produce AI chips. It produces the chips that Chinese consumer electronics manufacturers, automotive suppliers, and industrial equipment makers need to keep their supply chains running. By the metrics that dominate AI coverage — petaflops per second, training efficiency, benchmark scores — SMIC is irrelevant.

By a different metric — the accumulation of manufacturing process knowledge that will determine where Chinese semiconductor capability stands in 2035 — SMIC is arguably the most consequential company in the entire AI geopolitics story.

Manufacturing process knowledge in semiconductors is not like engineering knowledge in most industries. It is not primarily captured in patents, design documents, or transferable skills. It is embedded in the collective operational experience of engineers who have run thousands of processes, observed thousands of failure modes, developed thousands of incremental improvements to yield and consistency that individually seem trivial and collectively constitute the difference between a 30 percent yield and an 85 percent yield.

TSMC achieved its current manufacturing dominance through forty years of doing essentially one thing: making chips, for everyone, with relentless focus on process improvement. The company’s culture, documented in the memoirs of its founder Morris Chang and in academic studies of its institutional practices, is built around a manufacturing philosophy that treats every percentage point of yield improvement as a strategic priority and every process failure as a learning opportunity rather than a problem to be minimized in public communication.

SMIC does not have forty years of accumulated knowledge. It has twenty years — which is not nothing. It has been compressing that learning curve under the pressure of sanctions that removed its access to the best equipment, the most advanced design software, and the international process expertise that companies like TSMC acquired through deep relationships with Japanese, Dutch, and American equipment suppliers. The compression has produced a company that is several generations behind TSMC in leading-edge capability but is significantly more capable than it was in 2022.

The specific dynamics of the SMIC learning process under sanctions are instructive. When ASML DUV machines became restricted, SMIC engineers had to find ways to extend the life and capability of existing equipment beyond its designed parameters. This produced process innovations — multiple patterning techniques, alternative etch chemistries, novel alignment approaches — that are genuinely novel engineering solutions to constrained problems. Some of these innovations have reportedly been documented in Chinese semiconductor patent filings, though the international research community’s ability to assess these patents is limited.

When electronic design automation software from Cadence and Synopsys became restricted, Chinese alternatives — Empyrean Technology, Primarius Technologies — were pushed to develop capabilities that previously had no Chinese commercial market. These companies started from a position of being second-tier tools for non-cutting-edge designs and have, under state support and forced customer demand, developed capabilities closer to (though not yet at) the frontier. The process has taken years and involved significant customer pain for Chinese chip designers who had to cope with less capable tools.

The pattern is consistent across every category of restricted technology: a period of severe constraint and degraded output, followed by gradual adaptation, followed by incrementally improving domestic alternatives that are worse than the restricted imports but better than nothing, followed by continued improvement whose ultimate ceiling is genuinely uncertain.

The question of how long it takes to close these gaps is the strategically important one, and it is the one where analysis is most likely to be wrong in both optimistic and pessimistic directions.

The optimistic (from China’s perspective) view cites the precedent of Japan’s semiconductor industry. Japan entered advanced semiconductor manufacturing in the 1970s far behind American and European companies, with the advantage of protected domestic markets and aggressive government support, and reached competitive parity with US chip manufacturers by the mid-1980s. If a similar catch-up curve applies to SMIC, then domestic Chinese capability at something close to TSMC’s current node could arrive in the early 2030s.

The pessimistic view points to the specific nature of what was restricted. Japan’s catch-up occurred with full access to international equipment, software, and process expertise. SMIC is learning with equipment that is, in many cases, a generation or more behind what TSMC currently operates, and without access to the incremental equipment improvements that TSMC receives from its deep ongoing relationships with ASML, Tokyo Electron, and Applied Materials. The gap is not static — TSMC also continues to advance, using equipment that SMIC cannot access.

The honest answer is that the uncertainty range is wide and the outcome is sensitive to variables that are genuinely unpredictable: how aggressively China funds the program, whether there are breakthroughs in equipment design that sidestep existing export controls, whether the geopolitical environment changes in ways that relax some restrictions.

There is a subtler dimension to the SMIC story that gets almost no attention in the AI competition framing: the majority of China’s semiconductor needs are not for frontier AI chips. They are for the chips that go into automobiles, home appliances, industrial equipment, smartphones at mid-tier price points, and the infrastructure of the Internet of Things. These chips are typically made at process nodes between 28nm and 180nm — mature nodes where SMIC is already competitive, where the equipment restrictions bite less severely, and where domestic Chinese chipmakers can serve the domestic market with adequate technology.

This matters for the AI competition in an indirect but significant way. A China that has a robust domestic chip industry serving the majority of its consumer and industrial needs is a China that has a broader industrial base, more manufacturing experience, and more cross-domain technical knowledge than a China that is entirely dependent on imports for its semiconductor supply. The strategic value of domestic semiconductor capability is not limited to the frontier AI slice. It includes the entire technology stack that modern industrial economies depend on.

The export controls were targeted at the frontier — at preventing China from training competitive AI models. They have been less effective at, and in many cases not even aimed at, the broader capability accumulation that SMIC’s learning curve represents. A sanctions regime that prevents China from building its own H100 equivalent while inadvertently accelerating the development of a competent domestic chip industry for everything else may achieve its narrow objective while making its broader strategic purpose harder.

By 2027, SMIC has demonstrated production at what it calls its N+2 7nm process, though industry analysts characterize the effective performance as closer to 10nm in practical terms. The gap to TSMC’s N3 process — used for the most advanced smartphone processors and AI training chips — is approximately two to three generations, with TSMC’s knowledge and equipment advantage likely keeping that gap stable or widening it slightly over the next three to five years.

What that gap means for Chinese AI is that the training of frontier models remains constrained by hardware availability. What it means for Chinese industrial strategy is different: a country that was almost entirely dependent on foreign chips in 2018 has, by 2027, built a domestic industry capable of serving the majority of its non-frontier needs with domestically produced silicon. That is not winning the AI chip competition. It is building resilience against the tool that the US is wielding.

The two assessments are not contradictory. They are descriptions of a competition that has multiple dimensions being fought simultaneously, in which neither side’s single metric captures what is actually at stake.